Our Logic EFlash IP does not have any process overhead beyond standard CMOS process and scalable to the latest process nodes. You can embed it without any technology development with silicon foundries. This is a cost-effective solution for secure Non-Volatile Memory applications of your SoC, enabling lower power and lower latency NVM applications. Good retention margin of the IP is enabled with our proprietary disturbance free FN tunneling programming scheme and reliable on-chip high voltage circuits. Logic EFlash IPs have been silicon verified in 65nm and 180nm standard logic processes, and under development in 28nm and lower technology nodes from multiple foundries. All IPs are available upon request. If you are interested to integrate our IP, please don't hesitate to contact us!